More sophisticated technology has created a heightened demand for smaller, faster semiconductor devices incorporating an ever increasing number of components. An area of special interest is semiconductor memory devices, such as a random access memory ("RAM"), having greater storage capacity.
Typically, to increase the storage capacity of memory devices, a greater number of individual memory cells, as well as the additional components required to access the added cells, are incorporated. Because available area within a memory device is at a premium, the physical layout of the components must become more compact and the physical dimensions of each component must be decreased to prevent the overall dimensions of the memory devices from becoming excessively large. However, the ability to continue to decrease physical parameters is limited.
The need to increase storage capacity within the bounds of such physical constraints is especially critical in static RAM ("SRAM") devices in which a typical memory cell includes two cross-coupled storage devices coupled to a pair of complementary storage nodes which are accessed by two pass transistors coupled to complementary bit lines. The pass transistors have gate electrodes coupled to a word line. A signal, such as an address or SELECT signal, is provided on the word line associated with the memory cell to select or access the memory cell. Once selected via the word line, the memory cell can be read or written to through the pass transistors via the bit lines.
Such memory cells generally store only two logic states, thus severely limiting the storage capacity of the memory device. The first logic state is typically represented by a HIGH level signal stored at a first storage node and a LOW level signal stored at the second, complementary storage node. Similarly, the second logic state is represented by a LOW level signal stored at the first storage node and a HIGH level signal stored at the second, complementary storage node.
A memory cell capable of storing more than two logic states can increase the storage capacity of a memory device without requiring a corresponding increase in the number of individual memory cells and which may decrease the amount of layout area needed on the semiconductor substrate. Accordingly, rather than looking solely to component dimensions and component layout to increase storage capacity, a need exists for a memory cell capable of storing more than two logic states.